Verification Lead Engineer

Join the India team of most cutting-edge and well-funded storage startup in Silicon Valley as the Lead Verification Engineer taking on IP and SoC level verification challenges.

As a Verification Lead with a focus on verification of Multi-core, complex, high performance ASIC, you will work to understand the internal requirements and complexities of our SOC and architect the verification environment and solutions. You will help design the SoC and IP verification methodology, environment, test plan and tests. You will also work with design team to make sure that high quality verification is achieved for first pass success of SoC.

Location :
Bangalore, KA. India

Minimum Qualifications

BA/BS degree in Electrical/Electronics Engineering with 10+ years of practical experience
Strong fundamentals in digital ASIC design and verification
Expertise in ARM cores and related infrastructure (like Coresight, NIC/NOC, other bus interconnects etc.)
Familiarity with AMBA bus protocols, system memory hierarchy, system debug infrastructure and multi-core SOC
Strong experience with Verilog, System Verilog, UVM and/or other
Understanding of major SOC interfaces like PCIE, DRAM, Flash, I2C, SSP, UART is desirable
Understanding of IP designs and verification requirements
Strong test creation, debug capability and functional coverage understanding
Understanding of Gate Level Simulations (GLS) with timing and related debug capability
Excellent communication and leadership quality to technically mentor and lead a team of verification engineers

Roles And Responsibilities

Define and develop verification methodology, environment and test plans driven by functional coverage
Project management from building schedules, optimizing critical paths, managing resource allocation, and driving team execution to achieve or exceed project goal
Contribute to IP and SoC verification
Work closely with design team for continuous improvement of design quality through verification
Review the test plans, verification tests and coverage for other team members
Mentor team members for technical growth in verification
Establish process of verification and quality improvements
Contribute on GLS, emulation, FPGA based and Post Si validation

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