Job Description

Be part of the next technological revolution. Since 1968 Intel has been imagining a better future and continually advancing and enabling the technology to build it. We are not just a chip maker, we are a technology enabler who has been responsible for incubating and developing life changing technology that ranges from cloud computing to autonomous vehicles and drone technology. Be a part of what comes next and do something wonderful today. The PSG Structured ASIC Engineering Group PSAE, within Intel Programmable Solutions Group is seeking exceptional talent for an FPGA / ASIC IP Solutions Engineer to work with a diverse team designing Intel next generation Custom Structured ASIC -Intel eASIC based SOCs and Customer Design solutions - someone who is passionate to improve the way we solve complex problems through teamwork or direct contributions. The IP Solutions team within PSAE is responsible for delivering IP-solutions for Customer designs on Structured ASIC... demonstrating high quality RTL development, IP delivery and integration into SOCs, verification with all the IP Quality checks and Physical Convergence with the Structured ASIC device architecture and technology. We are looking for a talented ASIC Design Engineer to join our team. In this position, you will work on RTL design, integration, STA, FP and IP quality checks related flows across clusters, IP, Subsystems, SOCs. You will rapidly take features from concept to production and provide customer support, debug failures, and provide out of the box solutions. Responsibilities include but not limited: Develop and deliver IP Solutions in the area of Networking and Communications Interconnects, Video Processing and Memory interfaces. Enhance the frontend and backend design flows and methodologies across IPs and SOCs to identify key areas of improvement. Provide solutions to increase productivity of team. Identify, define and publish aspects related to RTL development, IP delivery, SOC integration, quality checks and back-end handoff. Provide project execution and methodology while working with both external and internal tool vendors. Develop and deploy productive and robust build, run, and flow management environments and systems. Develop and deploy scripts and automation to assist the design, validation and Phys Implementation teams. Develop, deploy and mentor tool usage methodologies.
Qualifications

Bachelor or Master's degree in Computer Science, Electrical or Computer Engineering or related degree.

Minimum Qualifications

5+ Years of experience with system Verilog and familiarity with a range of internal and 3rd-party logic design tools. using Python, Perl, Ruby, etc.

5+ years of experience in FE development flows and tools (Verilog design language, VCS, SpyGlass, DC, STA, Floorplan etc.)

5+ years developing enterprise-class programs, scripts and systems

Experience with Compute and communications networking concepts like Ethernet, JESD204, multi-protocol SERDES transceivers

Experience of FPGA design flow synthesis, place route

Preferred Qualifications
Experience in SoC/ASIC/FPGA RTL design and validation
Experience in design of SoCs or high complexity IP blocks

Experience in Ethernet/High-speed-IO PHY/MAC Design/uarch/integration
Inside this Business Group
The Programmable Solutions Group (PSG) was formed from the acquisition of Altera. As part of Intel, PSG will create market-leading programmable logic devices that deliver a wider range of capabilities than customers experience today. Combining Altera's industry-leading FPGA technology and customer support with Intel's world-class semiconductor manufacturing capabilities will enable customers to create the next generation of electronic systems with unmatched performance and power efficiency. PSG takes pride in creating an energetic and dynamic work environment that is driven by ingenuity and innovation. We believe the growth and success of our group is directly linked to the growth and satisfaction of our employees. That is why PSG is committed to a work environment that is flexible and collaborative, and allows our employees to reach their full potential.Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.htmlIt has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs
Bengaluru Karnataka India

Salary Criteria